The present invention relates to a solid image pickup device having a vertical overflow drain structure and a process for producing the same.
As an example of a CCD type solid image pickup device (hereinafter referred to as a solid image pickup device), one having a vertical overflow drain structure shown in FIG. 7 has been known.
In the solid image pickup device, light accepting sensor parts 2 of an island form conducting photoelectric conversion are arranged in a matrix form on a surface part of an N type silicon (Si) substrate 1. Vertical transfer parts 3 of a line form are formed on one side of a row of the light accepting sensor parts 2, and image separating regions 4 are formed on the other side of the row.
Transfer electrodes 5 of a line form are formed on a surface of the silicon substrate 1 at a position directly above the vertical transfer parts 3 via a silicon oxide film (not shown in the figure).
Outside a pixel region G having the light accepting sensor parts 2, the vertical transfer parts 3 and the image separating regions 4 formed therein, a P+ layer 6 is formed, and an N+ diffusion layer 7 is formed further outside the P+ layer 6. A 2P well 8 is formed under the vertical transfer parts 3 in the silicon substrate 1, and an overflow barrier layer 9 is formed under the 2P well 8 and the light accepting sensor parts 2 throughout the entire pixel region G but not reaching a peripheral part of the silicon substrate 1.
In the solid image pickup device having such a structure, light incident on the light accepting sensor part 2 is subjected to photoelectric conversion and accumulated as electrons in the light accepting sensor part 2. When the electrons are accumulated to a certain amount, excess electrons are drained over the overflow barrier layer 9 to the silicon substrate 1. The structure draining the excess electrons is called as the vertical overflow drain structure.
The potential of the overflow barrier layer 9 is generally controlled by the potential of the silicon substrate 1. Therefore, the so-called electronic shutter operation can be realized by the structure, in which a high voltage is applied to the silicon substrate 1 to break peaks of the potential of the overflow barrier layer 9, whereby the charge contained in the light accepting sensor part 2 is completely drained to the silicon substrate 1.
The voltage for the silicon substrate 1 is generally applied from the N+ diffusion layer 7 formed outside the pixel region G. The overflow barrier layer 9 is electrically connected to the image separating region 4 and the 2P well 8 of the pixel region G and is at a potential that approaches from the ground level to the potential of the silicon substrate 1 by a few volts. It is also electrically connected to the P+ layer 6 (ground level) formed in the vicinity of the pixel region G, and thus the entire pixel region G is effectively surrounded by a p well. In order that the potential of the silicon substrate 1 does not directly affect the pixel region G on conducting the electronic shutter operation, the N+ diffusion layer 7 is formed in the outermost peripheral region to ensure the substrate potential.
Because the overflow barrier layer 9 determines the depth of the region of the light accepting sensor part 2 conducting photoelectric conversion, the deeper the position of the overflow barrier layer 9 is, the larger the photoelectric conversion region is, and the higher the sensitivity is.
In the conventional solid image pickup device, the overflow barrier layer 9 is formed by ion implantation of boron (B), and the ion implantation is conducted by using a resist mask having openings at the positions corresponding to the pixel region G. Therefore, in order to make deeper the position of the overflow barrier layer 9 to improve the sensitivity with maintaining the conventional constitution, it is necessary that the implantation energy is sufficiently high, and the thickness of the resist as a mask upon ion implantation is also sufficiently large as corresponding to the high implantation energy. Specifically, the thickness of the resist mask is necessarily 1.5 times the depth of the overflow-barrier layer 9 formed, i.e., the distance corresponding to the projection range (Rp) of the ion implantation.
In the case where a mask made of resist is formed, openings are formed at the positions where the overflow barrier layer 9 is formed, i.e., the positions corresponding to the pixel region G. However, when the thickness of the resist is increased because of the reason described in the foregoing, the following problems occur.
In general, when a resist film having a large thickness is exposed, an amount of gas formed from the interior of the film is increased, and also the exposure time is increased. Thus, the resist film may be foamed because of a bumping of the reaction gas inside the resist film. When foaming of the resist film occurs, holes are formed at the foamed positions, and thus the desired mask performance cannot be obtained.
Furthermore, in order to coat resist to a large thickness, it is necessary that the resist is prepared to have a high viscosity, and the resist is coated by spin coating at a relatively low rate. In such a case, it is liable to cause unevenness in thickness in a radial pattern when coating, and therefore it is difficult to coat the resist to a large thickness.
Moreover, when ion implantation is conducted at a high implantation energy, for example, of from 6 to 7 MeV or higher, to form the overflow barrier layer 9 at the deeper position, a boron (B) atom to be implanted and a hydrogen atom constituting the resist collide with each other over the coulomb barriers of the atomic nuclei thereof to increase the probability of a nuclear reaction and to cause a problem of generation of radiation. The nuclear reaction is liable to occur with the largest probability at the time when the implanted ion is finally stopped by losing its energy by collision with the surrounding substances, i.e., at the time immediately before the ion is stopped.
Therefore, when the implantation energy is increased, it becomes difficult to use resist as the mask.
The invention has been developed in view of the problems associated with the conventional techniques, and an object thereof is to provide a process for producing a solid image pickup device and a solid image pickup device in that an overflow barrier layer can be formed at a deep position to enhance a photoelectric conversion region, and the generation of radiation due to the use of resist as a mask can be prevented.
The invention relates to, as a first aspect, a process for producing a solid image pickup device having a vertical overflow drain structure, in which ion implantation is conducted for an entire of a silicon substrate without using a resist mask, preferably at a high implantation energy, so as to form an overflow barrier layer.
According to the production process of the first aspect of the invention, the overflow barrier layer can be formed as a deep position by conducting the ion implantation with a high implantation energy, and the generation of radiation can be surely prevented by conducting the ion implantation without using a resist mask.
The invention also relates to, as a second aspect, a solid image pickup device having a vertical overflow drain structure, in which an overflow barrier layer is formed over an entire on a silicon substrate, a trench is formed in a peripheral part of the silicon substrate to surround a pixel region and to separate the overflow barrier layer into the pixel region and an outer peripheral part, and an impurity diffusion layer having a conductive type different from that of the overflow barrier layer is formed on an inner wall of the trench.
According to the solid image pickup device of the second aspect of the invention, the overflow barrier layer is electrically separated into the pixel region and the outer peripheral part thereof by the impurity diffusion layer because the trench is formed in the peripheral part of the silicon substrate to surround a pixel region and to separate the overflow barrier layer into the pixel region and the outer peripheral part, and the impurity diffusion layer having a conductive type different from that of the overflow barrier layer is formed on the inner wall of the trench. Therefore, the junction of the silicon substrate and the overflow barrier layer is exposed on the side surface of the silicon substrate, and the generation of a leakage electric current at that position is prevented.
The invention also relates to, as a third aspect, a process for producing a solid image pickup device having a vertical overflow drain structure, the process comprising a step of conducting ion implantation on an entire of a silicon substrate preferably with a high implantation energy to form an overflow barrier layer, a step of forming a trench in a peripheral part of the silicon substrate to surround a pixel region and to separate the overflow barrier layer into the pixel region and an outer peripheral part, and a step of forming an impurity diffusion layer having a conductive type different from that of the overflow barrier layer on an inner wall of the trench.
According to the production process of the third aspect of the invention, the overflow barrier layer can be electrically separated into the pixel region and the outer peripheral part thereof by the impurity diffusion layer by forming the trench in the peripheral part of the silicon substrate to surround a pixel region and to separate the overflow barrier layer into the pixel region and the outer peripheral part, and by forming the impurity diffusion layer having a conductive type different from that of the overflow barrier layer on the inner wall of the trench. Therefore, the junction of the silicon substrate and the overflow barrier layer is exposed on the side surface of the silicon substrate, and the generation of a leakage electric current at that position is prevented.
Furthermore, when the overflow barrier layer is formed by conducting ion implantation without using a resist mask, the problems associated with conducting the ion implantation at a high energy can be avoided, so as to form the overflow barrier layer at a deep position.